New in Platform
September 2026
New Features
Design Studio - Power and supply nets:
Rails can start from one block. A supply handle on each block creates a connection ending in a symbol, so a rail can exist before the blocks that use it.
Blocks join a rail by name. Each net gets a unique name (SUPPLY-1, or a renamed 3V3_MAIN). Matching names connect blocks electrically, with no limit on how many share a net. The name carries through to the exported PDF and netlist.
Names are protected. Unique per project, capitalisation-insensitive, capped at 10 characters, and GND is refused since it would be read as board ground.
Symbols or wire, per rail. The choice is stored with the project, so it survives a reload.
Rails carry a voltage. Set once per net, shown on symbols, wires and thumbnails. Optional, and Find Solutions can recommend one.
The supply port on each part can be picked. Ports that cannot carry the voltage, conflict with the direction, or are already used are greyed out.
Those picks constrain the solve. A chosen voltage or port limits which parts qualify, and an impossible combination returns a specific message rather than a general failure to find a solution.
Problems are counted and walkable. Buttons on the canvas step through each flagged block, symbol or wire, explain it, and offer to hand it to the Design Assistant.
Thumbnails match the canvas. Project thumbnail shows net names, voltages and symbol chips.
Handling is smoother. Symbols drag around their block, a preview shows where a new one lands, and popups can be moved aside.


CELUS CAD:
Copper polygons promote to custom-shaped pads, created and edited in a dedicated pad editor inside the footprint editor.
Improvements & Bug Fixes
Canvas editing is smoother across connectors, junctions, copy-paste and net name lists.
Page layout, idle sessions and project package export are more reliable.
CAD editing is more accurate in the 3D view, snapping, dimensions and net labels.
An intelligent electronics design platform that seamlessly automates component search, schematic generation, and EDA handover.
© Copyright 2026 CELUS · All rights reserved.